On Area Minimization of Complex Combinational Circuits Using Cartesian Genetic Programming
Created by W.Langdon from
gp-bibliography.bib Revision:1.7970
- @InProceedings{Vasicek:2012:CEC,
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title = "On Area Minimization of Complex Combinational Circuits
Using Cartesian Genetic Programming",
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author = "Zdenek Vasicek and Lukas Sekanina",
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pages = "825--832",
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booktitle = "Proceedings of the 2012 IEEE Congress on Evolutionary
Computation",
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year = "2012",
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editor = "Xiaodong Li",
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month = "10-15 " # jun,
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DOI = "doi:10.1109/CEC.2012.6256649",
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address = "Brisbane, Australia",
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ISBN = "0-7803-8515-2",
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keywords = "genetic algorithms, genetic programming, cartesian
genetic programming, Evolvable hardware and software",
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abstract = "The paper deals with the evolutionary post synthesis
optimization of complex combinational circuits with the
aim of reducing the area on a chip as much as possible.
In order to optimise complex circuits, Cartesian
Genetic Programming (CGP) is employed where the fitness
function is based on a formal equivalence checking
algorithm rather than evaluating all possible input
assignments. The standard selection strategy of CGP is
modified to be more explorative and so agile in very
rugged fitness landscapes. It was shown on the
LGSynth93 benchmark circuits that the modified
selection strategy leads to more compact circuits in
roughly 50percent cases. The average area improvement
is 24percent with respect to the results of
conventional synthesis. Delay of optimised circuits was
also analysed.",
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notes = "WCCI 2012. CEC 2012 - A joint meeting of the IEEE, the
EPS and the IET.",
- }
Genetic Programming entries for
Zdenek Vasicek
Lukas Sekanina
Citations