Functional Equivalence Checking for Evolution of Complex Digital Circuits
Created by W.Langdon from
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- @InCollection{Sekanina:2015:EHPA,
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author = "Lukas Sekanina and Zdenek Vasicek",
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title = "Functional Equivalence Checking for Evolution of
Complex Digital Circuits",
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booktitle = "Evolvable Hardware From Practice to Application",
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publisher = "Springer",
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year = "2015",
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editor = "Martin A. Trefzer and Andy M. Tyrrell",
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series = "Natural Computing Series",
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chapter = "6",
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pages = "175--189",
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keywords = "genetic algorithms, genetic programming, Cartesian
Genetic Programming, Boolean Satisfiability SAT",
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isbn13 = "978-3-662-44615-7",
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URL = "http://www.fit.vutbr.cz/research/view_pub.php?id=10396",
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DOI = "doi:10.1007/978-3-662-44616-4_6",
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abstract = "Inspired by a seminal paper (Higuchi et al, 1993),
many researchers have started to work on evolutionary
design and optimisation of combinational digital
circuits. In this method, electronic circuits encoded
as strings of symbols are constructed and optimised by
the EA in order to obtain a circuit implementation
satisfying the specification. In order to evaluate a
candidate circuit, a reconfigurable circuit (or its
simulator if evolution is performed using a circuit
simulator) is reconfigured using a new configuration
created on the basis of the chromosome (i.e.
configuration string) content. The configured device is
then evaluated and its behaviour is compared with the
desired behaviour. The fitness score is calculated,
which reflects to what extent the candidate circuit
satisfies the specification. The main reason why
evolutionary circuit design has been studied and
developed is its ability to (i) provide novel designs
hardly reachable by means of conventional methods; (ii)
deliver good solutions for problems where the
specification is inherently incomplete and no golden
solution exists; and (iii) achieve adaptation/fault
tolerance directly at the hardware level. Recent
overviews of applications and design methods can be
found, for example, in (Sekanina et al, 2011; Haddow
and Tyrrell, 2011; Sekanina, 2012).",
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notes = "6.2 Functional Equivalence Checking, 6.2.1 SAT
Problem, 6.2.2 SAT-Based Functional Equivalence
Checking, 6.2.3 Creating a Circuit to Be Verified from
the Parent and Offspring, 6.2.4 Converting the Circuit
to a Logic Formula in CNF, 6.2.5 Solving the Logic
Formula Using a SAT Solver, 6.2.6 Further Optimisations
of Functional Equivalence Checking, 6.3 Embedding
Functional Equivalence Checking into CGP, 6.3.1
Cartesian Genetic Programming, 6.3.2 SAT Solver in the
Fitness Function, 6.4 Experimental Results, 6.4.1
Speedup Against Standard CGP, 6.4.2 Benchmark Circuits,
6.5 Final Thoughts",
- }
Genetic Programming entries for
Lukas Sekanina
Zdenek Vasicek
Citations