Automated synthesis of passive filter circuits including parasitic effects by genetic programming
Introduction
Traditional passive filter synthesis methods treat circuit components as ideal ones. Unfortunately, this assumption is no longer suitable for high-frequency application because of parasitic effects. For a given specification, a compliant circuit resulting from traditional design methods may fail to satisfy the same specification when the parasitic effects are taken into account. The authors of [1] have proposed a genetic algorithm to synthesize analog circuits including parasitic effects. However, the genetic algorithm approach deals with only the evolution of component values, and the circuit topology should be predetermined by other methods. Some methods have been proposed to deal with the evolution of circuit topology as well as the component values and shown their capability of generating a variety of circuit topologies [2], [3], [4], [5], [6], [7], [8], [9], [10], [11]. In our previous work, we proposed a novel tree representation of RLC circuits and a genetic programing (GP) method to synthesize passive filter circuits [12], [13]. This approach allows circuit topology as well as component values to be evolved simultaneously. The proposed method is restricted to series–parallel circuit topology. However, this restriction makes it more efficient than those general-topology methods in passive filter synthesis if the target circuits are confined to series–parallel topology, which is commonly used in practice owing to less component value sensitivity and reduced circuit complexity [14]. Furthermore, for a given specification our method can automatically find efficient circuit (in terms of circuit complexity) without predetermining the number of the circuit components required. In this paper, we extend our previous work to take the parasitic effects into consideration. By exploring the possible solution space consisting of various circuit topologies and component values, the GP approach can generate circuits different from those generated by traditional methods. The experimental results show the extended GP method can effectively generate compliant circuits including the parasitic effects, while the traditional methods fail. In addition, the GP-evolved circuits are more efficient than the traditional ones.
The remainder of the paper is organized as follows. Section 2 introduces the tree representation of RLC circuits and a circuit analysis algorithm based on the tree representation. Section 3 introduces the GP method to synthesize passive filter circuits. Section 4 describes how to model the parasitic effects and how to incorporate them into the GP method. Experimental results are given in Section 5, and the conclusion is given in Section 6.
Section snippets
Tree representation of RLC circuits
We find that a binary tree structure can be used to represent series–parallel RLC circuits. An RLC circuit and the corresponding tree representation are shown in Fig. 1(a) and (b), respectively. Adopting the terminology commonly used in GP, we divide the nodes of the tree into two sets, the terminal set and the function set [15]. The non-terminal nodes belong to the function set including series and parallel nodes, which are denoted by + and //, respectively. The terminal nodes belong to the
Genetic programing
The main idea of GP is based on the evolutionary process observed in nature. To begin with, an initial population composed of a number of solutions (called individuals) is randomly generated. Each individual, in circuit synthesis problems, is a circuit consisting of circuit topology, component type, and component values. New potential solutions are created by genetic operations, such as crossover and mutation. Each individual is evaluated and assigned a scalar value (called fitness) reflecting
Parasitic effects
When operating in high frequencies, passive components are far from being ideal, but contain parasitic effects, which can be modeled as the equivalent circuits as shown in Fig. 5 [16]. In addition, circuit interconnect nodes are also non-ideal and can be modeled as capacitance between the interconnect node and the ground node. Fig. 6(a) illustrates how the ideal terminal node (i.e. L or C) is incorporated with the component parasitic effect subtree to create the equivalent subtree including the
Experimental results
Two low-pass filter design cases were considered in our experiment.
Conclusion
The proposed GP method has shown its capability of generating efficient passive filter circuits including parasitic effects, and it can include more complex parasitic effects as long as the effects can be modeled by parallel or series passive components. It should be mentioned that the proposed method is limited to the design cases where the parasitic effects are known. However, since the previously published work, such as [17], shows that genetic approaches can be applied to circuit extraction
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