Skip to main content
Log in

Evolutionary Synthesis of Logic Circuits Using Information Theory

  • Published:
Artificial Intelligence Review Aims and scope Submit manuscript

Abstract

In this paper, we propose the use of Information Theory as thebasis for designing a fitness function for Boolean circuit designusing Genetic Programming. Boolean functions are implemented byreplicating binary multiplexers. Entropy-based measures, such asMutual Information and Normalized Mutual Information areinvestigated as tools for similarity measures between the targetand evolving circuit. Three fitness functions are built over aprimitive one. We show that the landscape of Normalized MutualInformation is more amenable for being used as a fitness functionthan simple Mutual Information. The evolutionary synthesizedcircuits are compared to the known optimum size. A discussion ofthe potential of the Information-Theoretical approach is given.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  • Cheushev, V., Moraga, C., Yanushkevich, S., Shmerko, V. & Kolodziejczyk, J. (2001). Information Theory Method for Flexible Network Synthesis. In Proceedings of the IEEE 31st. International Symposium on Multiple-Valued Logic, 201–206. IEEE Press.

  • Coello Coello, C. A., Christiansen, A. D. & Hernández Aguirre, A. (2000). Use of Evolutionary Techniques to Automate the Design of Combinational Logic Circuits. International Journal of Smart Engineering System Design 2: 299–314.

    Google Scholar 

  • Coello Coello, C. A., Christiansen, A. D. & Hernández Aguirre, A. (2001). Towards Automated Evolutionary Design of Combinational Circuits. Computers and Electrical Engineering 27: 1–28.

    Google Scholar 

  • Coello Coello, C. A., Christiansen, A. D. & Hernández Aguirre, A. (1996). Using Genetic Algorithms to Design Combinational Logic Circuits. In Dagli, C. H., Akay, M., Chen, C. L. P., Benito, R., Farnández & Ghosh, J. (eds.) Intelligent Engineering Systems Through Artificial Neural Networks. Volume 6. Fuzzy Logic and Evolutionary Programming, 391–396. St. Louis, Missouri, USA: ASME Press, Nov.

    Google Scholar 

  • Coello Coello, C. A., Christiansen, A. D. & and Hernández Aguirre, A. (1997). Automated Design of Combinational Logic Circuits Using Genetic Algorithms. In Smith, D. G., Steele, N. C. & Albrecht, R. F. (eds.) Proceedings of the International Conference on Artificial Neural Nets and Genetic Algorithms, 335–338. University of East Anglia, England: Springer-Verlag, April.

    Google Scholar 

  • Cover, T. M. & Thomas, J. A. (1991). Elements of Information Theory. New York: John Wiley & Sons.

    Google Scholar 

  • Dill, K. M., Herzog, J. H. & Perkowski, M. A. (1997). Genetic Programming and Its Application to the Synthesis of Digital Logic. In Proceedings of the 1997 IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, Vol 2, 823–826. IEEE Computer Society.

    Google Scholar 

  • Drechsler, R., Becker, B. & Göckel, N. (1995). A Genetic Algorithm for Minimization of Fixed Polarity Reed-Muller Expressions. In Proceedings of the International Conference on Artificial Neural Networks and Genetic Algorithms, 392–395. Ales, April.

  • Drechsler, R., Göckel, N. & Becker, B. (1996). Learning Heuristics for OBDD Minimization by Evolutionary Algorithms. In Voigt, H.-M., Ebeling, W., Rechenberg, I. & Schwefel, H. P. (eds.) Proceedings of the Conference Parallel Problem Solving from Nature PPSN-IV, 730–739. Berlin: Springer.

    Google Scholar 

  • Drechsler, R. & Becker, B. (1998). Binary Decision Diagrams: Theory and Implementation. Boston, USA: Kluwer Academic Publishers.

    Google Scholar 

  • Droste, S. (1997). Efficient Genetic Programming for Finding Good Generalizing Boolean Functions. In Koza, J. R., Deb, K., Dorigo, M., Fogel, D. B., Garzon, M., Iba, H. & Riolo, R. L. (eds.) Genetic Programming 1997: Proceedings of the Second Annual Conference, 82–87. San Francisco, CA, USA: Morgan Kaufmann

    Google Scholar 

  • Hartmann, C. R. P., Varshney, P. K., Mehrotra, K. G. & Gerberich, C. L. (1982). Application of Information Theory to the Construction of Efficient Decision Trees. IEEE Transactions on Information Theory 28(5): 565–577.

    Google Scholar 

  • Hernández Aguirre, A., Buckles, B. P. & Coello Coello, C. A. (2001). Ga-Based Learning of kdnf s n Boolean Formulas. In Evolvable Systems: From Biology to Hardware, 279–290. Tokyo, Japan: Springer Verlag, 3–5 October.

    Google Scholar 

  • Hernández Aguirre, A., Buckles, B. P. & Coello Coello, C. A. (2000). Evolutionary Synthesis of Logic Functions Using Multiplexers. In Dagli, C., Buczak, A. L. et al. (eds.) Proceedings of the 10th Conference Smart Engineering System Design, 311–315. New York: ASME Press.

    Google Scholar 

  • Hernández Aguirre, A., Buckles, B. P. & Alcántara, A. M. (2000a). The PAC Population Size of a Genetic Algorithm. In Twelfth International Conference on Tools with Artificial Intelligence, 199–202. Vancouver British Columbia, Canada: IEEE Computer Society, 13–15 November.

    Google Scholar 

  • Hernández Aguirre, A., Buckles, B. P. & Coello Coello, C. A. (2000b). Gate-Level Synthesis of Boolean Functions Using Binary Multiplexers and Genetic Programming. In Conference on Evolutionary Computation 2000, 675–682. IEEE Computer Society.

  • Hernández Aguirre, A., Coello Coello, C. A. & Buckles, B. P. (1999). A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers. In Stoica, A., Keymeulen, D. & Lohn, J. (eds.) Proceedings of the First NASA/DoD Workshop on Evolvable Hardware, 46–53. Los Alamitos, California: IEEE Computer Society.

    Google Scholar 

  • Iba, H., Iwata, M. & Higuchi, T. (1997). Gate-Level Evolvable Hardware: Empirical Study and Application. In Dasgupta, D. & Michalewicz, Z. (eds.) Evolutionary Algorithms in Engineering Applications, 259–276. Berlin: Springer-Verlag.

    Google Scholar 

  • Islas Pérez, E., Coello Coello, C. A. & Hernández Aguirre, A. (2003). Extracting and Re-Using Design Patterns from Genetic Algorithms Using Case-Based Reasoning. Engineering Optimization (April) 35(2): 121–141.

    Google Scholar 

  • Kabakcioglu, A. M., Varshney, P. K. & Hartmann, C. R. P. (1990). Application of Information Theory to Switching Function Minimization. IEE Proceedings, Part E 137: 387–393.

    Google Scholar 

  • Kalganova, T. (2000). Bidirectional Incremental Evolution in Extrinsic Evolvable Hardware In Lohn, J., Stoica, A., Keymeulen, D. & Colombano, S. (eds.) Proceedings of the Second NASA/DoD Workshop on Evolvable Hardware, 65–74. Los Alamitos, California: IEEE Computer Society.

    Google Scholar 

  • Koza, J. R. (1992). Genetic Programming. On the Programming of Computers by Means of Natural Selection. Massachusetts, USA: MIT Press.

    Google Scholar 

  • Lloris, A., Gomez-Lopera, J. F. & Roman-Roldan, R. (1993). Using Decision Trees for the Minimization of Multiple-Valued Functions. International Journal of Electronics 75(6): 1035–1041.

    Google Scholar 

  • Louis, S. J. (1993). Genetic Algorithms as a Computational Tool for Design. PhD thesis, Indiana University, Indiana, USA.

    Google Scholar 

  • Louis, S. J. & Johnson, J. (1997). Solving Similar Problems using Genetic Algorithms Case-Based Memory. In Bäck, T. (ed.) Proceedings of the Seventh International Conference on Genetic Algorithms, 283–290. San Francisco, California: Morgan Kaufmann Publishers.

    Google Scholar 

  • Luba, T., Moraga, C., Yanushkevich, S., Shmerko, V. & Kolodziejczyk, J. (2000). Application of Design Style in Evolutionary Multi-Level Network Synthesis. In Proceedings of the 26th EUROMICRO Conference Informatics:Inventing the Future, 156–163. IEEE Press.

  • Luba, T., Moraga, C., Yanushkevich, S., Opoka, M. & Shmerko, V. Evolutionary Multi-Level Network Synthesis in Given Design Style. In Proceedings of the 30th IEEE International Symposium on Multiple valued Logic, 253–258. IEEE Press.

  • Maes, F., Collignon, A., Vandermeulen, D., Marchal, G. & Suetens, P. (1997). Multimodality Image Registration by Maximization of Mutual Information. IEEE Transactions on Medical Imaging (April) 16(2): 187–198.

    Google Scholar 

  • Miller, J. F., Thomson, P. & Fogarty, T. (1998). Designing Electronic Circuits Using Evolutionary Algorithms. Arithmetic Circuits: A Case Study. In Quagliarella, D., Périaux, J., Poloni, C. & Winter, G. (eds.) Genetic Algorithms and Evolution Strategy in Engineering and Computer Science, 105–131. Chichester, England: Morgan Kaufmann.

    Google Scholar 

  • Miller, J. F., Job, D. & Vassilev, V. K. (2000). Principles in the Evolutionary Design of Digital Circuits – Part I. Genetic Programming and Evolvable Machines (April) 1(1/2): 7–35.

    Google Scholar 

  • Miller, J. F., Job, D. & Vassilev, V. K. (2000a). Principles in the Evolutionary Design of Digital Circuits – Part II. Genetic Programming and Evolvable Machines (July) 1(3): 259–288

    Google Scholar 

  • Quinlan, J. R. Learning Efficient Classification Procedures and Their Application to Chess Games. (1983). In Michalski, R. S., Carbonell, J. G. & Mitchell, T. M. (eds.) Machine Learning: An Artificial Intelligence Approach, 463–482. Berlin, Heidelberg: Springer.

    Google Scholar 

  • Shannon, C. E. (1948). A Mathematical Theory of Information. Bell System Technical Journal (July) 27: 379–423.

    Google Scholar 

  • Scholl, C. & Becker, B. (2000). On the Generation of Multiplexer Circuits for Pass Transistor Logic. In Proceedings of Design, Automation, and Test in Europe.

  • Studholme, C., Hill, D. L. G. & Hawkes, D. J. (1999). An Overlap Invariant Entropy Measure of 3D Medical Image Alignment. Pattern Recognition 32: 71–86.

    Google Scholar 

  • Torresen, J. (2002). A Scalable Approach to Evolvable Hardware. Genetic Programming and Evolvable Machines 3(3): 259–282.

    Google Scholar 

  • Thompson, A., Layzell, P. & Zebulum R. S. (1999). Explorations in Design Space: Unconventional Design Through Artificial Evolution. IEEE Transactions on Evolutionary Computation (September) 3(3): 167–196.

    Google Scholar 

  • Vassilev, V. K. & Miller, J. F. (2000). Scalability Problems of Digital Circuit Evolution In Lohn, J., Stoica, A., Keymeulen, D. & Colombano, S. (eds.) Proceedings of the Second NASA/DoD Workshop on Evolvable Hardware, 55–64. Los Alamitos, California: IEEE Computer Society.

    Google Scholar 

  • Weaver, W. & Shannon, C. E. (1949). The Mathematical Theory of Communication. Urbana, Illinois: University of Illinois Press.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

About this article

Cite this article

Aguirre, A.H., Coello Coello, C.A. Evolutionary Synthesis of Logic Circuits Using Information Theory. Artificial Intelligence Review 20, 445–471 (2003). https://doi.org/10.1023/B:AIRE.0000006603.98023.97

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1023/B:AIRE.0000006603.98023.97

Navigation